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Topics of interest include but are not limited to, the following
- IC/module design
- Low-power design
- Electronic design automation
- Design/test verification
- Fault modelling
- Test generation
- Fault simulation
- Design of testability
- Synthesis of testability
- Built-in self-test
- Test specifications
- Formal verification of hardware
- Simulation for verification
- Design debugging
- Testing of VLSI devices printed circuit boards, and electronic systems
- Testing of analog and digital electronic circuits
- Testing of microprocessors, memories and signal processing devices
- SOC and SIP testing
- Memory and FPGA test and repair
- Delay testing
- IDDQ test
- Novel test methods
- Effectiveness of test methods
- Fault models and ATPG, and DPPM prediction
- DFT for analog/mixed signal ICs and system-on-chip
- DFT and BIST for digital and SoC
Paper Submission
Authors are invited to submit papers for this journal through E-mail [email protected]. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this Journal.
Important Dates
| Submission Deadline |
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February 14, 2020 |
| Authors Notification |
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March 14, 2020 |
| Final Manuscript Due |
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March 22, 2020 |
| Publication Date |
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Determined by the Editor-in-Chief |
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