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VTS 2021 : 39th IEEE VLSI Test Symposium

Virtual Interactive Live Event
Event Date: Apr 25, 2021 - Apr 28, 2021
Abstract Submission Deadline: Nov 07, 2020
Submission Deadline: Nov 14, 2020
Notification of Acceptance: Dec 21, 2020
Camera Ready Version Due : Feb 05, 2021

About

The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in test, validation, yield, reliability and security of microelectronic circuits and systems. The 2021 edition of VTS will be an online virtual interactive live event.

The program includes keynotes, scientific paper presentations, short industrial application paper presentations, special sessions and Innovative Practices sessions.

Call For Paper

VTS Topics

  • Analog, Mixed-Signal, RF Test
  • ATPG & Compression
  • Silicon Debug
  • Automotive Test & Safety
  • Built-In Self-Test (BIST)
  • Defect & Current Based Test
  • Defect & Fault Tolerance
  • Delay & Performance Test
  • Design for Testability, Yield or Reliability
  • Pre-silicon Design Verification & Validation
  • Post-silicon Validation
  • Embedded System & Board Test
  • Embedded Test Methods
  • Emerging Technologies Test and Reliability
  • FPGA Test
  • Fault Modeling and Simulation
  • Hardware Security
  • Low-Power IC Test
  • Machine Learning in Test,Yield and Reliability
  • Microsystems/MEMS/Sensors Test
  • Memory Test and Repair
  • On-Line Test & Error Correction
  • Power & Thermal Issues in Test
  • System-on-Chip (SOC) Test
  • Test & Reliability of Biomedical Devices
  • Test & Reliability of High-Speed I/O
  • Test & Reliability of Machine Learning Systems
  • Test Quality & Reliability
  • Test Standards & Economics
  • Test Resource Partitioning
  • Transient & Soft Errors
  • 2.5D, 3D & SiP Test
  • Yield Optimization

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