★2019 International Workshop on Design Automation (IWoDA 2019)-- Ei Compendex & Scopus—Call for papers |October 15-17, 2019|Jeju Island, Korea|Website:http://www.iwoda.org/ ★IWoDA 2019 presents researchers, engineers, and academics with an unprecedented opportunity to associate and interact with some of the foremost experts in the field of Design Automation from around the globe. IWoDA 2019 aims to be the must-visit conference of the year for the field, and will be the ideal forum for the exchange of ideas and innovations that promise to change the face of the industry. For researchers, an engineers, or industry professionals, this conference could mark an important point in your career. ★Publication and Indexing All accepted papers will be published in the digital conference proceedings which will send to be indexed by all major citation databases such as Ei Compendex, Scopus, Google Scholar, Cambridge Scientific Abstracts (CSA), Inspec, SCImago Journal & Country Rank (SJR), EBSCO, CrossRef, Thomson Reuters (WoS), etc. A selection of papers will be recommended to be published in journals. ★Program Preview/ Program at a glance October 15: Conference registration + Tutorial(pending) + Icebreaker reception October 16: Invited Speech + Technical Sessions + Closing Ceremony October 17: One day Tour/ Halfday tour/Field trip ★Paper Submission 1. PDF version submit via CMT:https://cmt3.research.microsoft.com/IWODA2019 2.Submit Via email directly to: [email protected] ★CONTACT US Ms.Tiya T. Deng Email: [email protected] Website:http://www.iwoda.org/ Call for papers(http://www.iwoda.org/cfp.html): 2D/3D on-chip power delivery network analysis and optimization Hardware for large-scale data analytics and processing Advanced multimedia application Hardware Security Analog and mixed-signal/RF test High-frequency electromagnetic simulation of circuit Analog Design, Simulation, Verification and Test High-level synthesis tool and methodology Analog layout, verification and simulation techniques Human-computer interface Analog/mixed-signal modeling and simulation techniques HW/SW co-design, co-simulation and co-verification Analog/mixed-signal/RF synthesis In-Package and On-Chip Communication and Networks-on-Chip Architectural low-power design technique Inter/intra-chip interconnect and network, and interface and I/O Architecture, tool and methodology for secure hardware Interconnect planning and synthesis Architectures for machine learning and artificial intelligence Internet of things Artificial intelligence hardware and systems IP/platform-based SoC design ATPG, BIST and DFT Kernel, middleware and virtual machine Automotive system design and optimization Logic synthesis and physical design technique for FPGA Autonomous Systems Architectures Low-power design and methodology Autonomous Systems Design Tools and Methodologies Machine Learning and Artificial Intelligence Architectures Autonomous Systems Safety and Reliability Machine learning architecture Big data application Machine learning techniques for verification Biochip and biodata processing etc. Manufacturing Test and Reliability Biomedical application Many- and multi-core SoC architecture CAD for memory circuits Memory test and repair CAD for nanotechnology, MEMS, 3D IC, quantum computing etc. Mixed-signal design consideration Circuit-level formal verification Model- and component-based embedded system/software design Clock network synthesis Near-Memory and In-Memory Computing Combinational, sequential and asynchronous logic synthesis Networks-on-chip and NoC-based system design Communication traffic and modeling Neuromorphic and brain-inspired computing Communication-centric system design, application, and simulation New transistor/device and process technology: spintronic, phase-change, single-electron etc. Compiler and toolchain Noise analysis Cross-Layer Power Analysis and Low-Power Design Online test and fault tolerance Cross-layer security Optical/photonic interconnect and network Cyber physical system Package/PCB/3D-IC routing Cyber-physical systems and Internet-of-Things (IoT) platforms Physical Design and Verification, Lithography and DFM Cyber-physical systems and IoT security Placement and routing optimization Dependable architecture Post layout and post-silicon optimization Design for manufacturability, yield, and defect tolerance Power modeling, analysis and simulation Design for reliability, aging, and robustness Power/ground and package modeling, analysis and optimization Design for security and security primitive Power-aware analog circuit/system design Design methodology for mobile, wearable and Internet of Things devices Rack-scale interconnect and network Design of Cyber-physical Systems and IoT Real-time system Design Verification and Validation Reconfigurable and self-adaptive SoC architecture Deterministic/statistical timing and performance analysis and optimization Reliability, aging and soft error analysis Device/circuit/interconnect modeling and analysis Resilience under manufacturing variation Device/circuit-level simulation tool and methodology Resource allocation for heterogeneous computing platform Digital and Analog Circuits Reticle enhancement, lithography-related design and optimization Digital Design, Timing and Simulation RTL and gate-leveling modeling, simulation and verification Domain-specific architecture RTL/Logic Level and High-level Synthesis Domain-specific embedded libraries (e.g., for machine learning) Security modeling and analysis Electromobility Security vulnerabilities in artificial intelligence Embedded and Cross-Layer Security Signal/power integrity, EM modeling and analysis Embedded Memory, Storage and Networking SoC, Heterogeneous, and Reconfigurable Architectures Embedded Software Storage software and application Embedded System (beyond chip) Design Methodologies Storage system and memory architecture Emerging Device Technologies System test and 3D IC test Emerging interconnect technology and application System verification and analysis Emerging models of computation System-level design exploration, synthesis and optimization Energy harvesting and battery management System-level formal verification Energy-storage/smart-grid/smart-building design and optimization System-level modeling, simulation and validation tools/methodology Extraction, TSV and package modeling System-on-Chip Design Methodology Fault analysis, detect and tolerance Technology mapping Fault modeling and simulation Thermal aware design Floorplanning, partitioning and placement Time-Critical System Design Validation of cognitive systems
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